Non-volatile memory, such as, for example, flash memory, may be used in various storage devices, such as, for example, secure digital memory cards (SD cards), USB sticks, solid state drives (SSDs), and internal memory of various electronic devices, such as, for example, mobile phones, tablet computers, media players, etc. Further applications of non-volatile memory include embedded systems, such as microcontrollers, wherein a non-volatile memory device may be integrated on a same semiconductor structure as other circuitry of a microcontroller, such as, for example, volatile memory, a CPU and/or input/output devices.
Types of non-volatile memory devices include split gate non-volatile memory devices, which may include a plurality of split gate non-volatile memory cells that are typically arranged in an array and are electrically connected to electrically conductive lines extending along columns and rows of the array. The electrically conductive lines may be used for programming, erasing and/or reading the split gate non-volatile memory cells.
For reading data from a split gate non-volatile memory cell, the source region may be grounded, and relatively small positive voltages of, for example, about 1 V may be applied to the select gate electrode, the control gate electrode and the drain. The channel region between the source region and the drain region may be influenced by the electrical charges stored at the charge storage layer, so that a current that is representative of the data stored in the split gate non-volatile memory cell flows between the drain region and source region of the split gate non-volatile memory cell.
For programming split gate non-volatile memory cells, a source side injection of charge carriers into the charge storage layer may be performed. For this purpose, the drain region of the split gate non-volatile memory cell may be grounded, a relatively high positive voltage of, for example, about 4 V may be applied to the source region, and an even higher positive voltage, for example a voltage in a range from about 6-9 V, may be applied to the control gate electrode. A voltage slightly greater than the threshold voltage of the channel region of the split gate non-volatile memory cell may be applied to the select gate electrode.
The split gate non-volatile memory cell may be erased by Fowler-Nordheim tunneling. For this purpose, a negative bias may be applied between the control gate electrode and the source and drain regions. For example, a relatively high negative voltage of, for example, about −6 V may be applied to the control gate electrode, and a relatively high positive voltage of, for example, about 6 V may be applied to each of the source region and the drain region. A relatively high positive voltage of, for example, about 5 V may be applied to the select gate electrode.
Known split gate non-volatile memory devices may have issues associated therewith. For example, such non-volatile memory devices require a lot of chip space. Further, current non-volatile memory devices suffer several limitations, such as scalability issues or program disturbance.
Accordingly, it is desirable to provide integrated circuits with improved non-volatile memory structures. It is also desirable to provide non-volatile memory structures with improved scalability, increased program/erase speed, minimized program disturbance and with improved endurance. Further, it is desirable to provide a method for fabricating an integrated circuit including a non-volatile memory structure that is cost effective and time efficient. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.